PIPELINE BREAK

Domain	Definition
Computing	Pipeline break (Or "pipeline stall") The delay caused on a processor using pipelines when a transfer of control is taken. Normally when a control-transfer instruction (a branch, conditional branch, call or trap) is taken, any following instructions which have been loaded into the processor's pipeline must be discarded or "flushed" and new instructions loaded from the branch destination. This introduces a delay before the processor can resume execution. "Delayed control-transfer" is a technique used to reduce this effect. (1996-10-13). Source: The Free On-line Dictionary of Computing.
Source: compiled by the editor from various references; see credits.

Anagrams: PIPELINE BREAK

Scrabble® Enable2K-Verified Anagrams
	Words within the letters "a-b-e-e-e-i-i-k-l-n-p-p-r"
	-5 letters: barnlike, beanlike, bearlike, bilinear, keepable, pelerine, perineal, pinelike, pipelike, pipeline, piperine, plebeian, rippable.
Source: compiled by the editor from various references; see credits. SCRABBLE® is a registered trademark. All intellectual property rights in and to the game are owned in the U.S.A and Canada by Hasbro Inc., and throughout the rest of the world by J.W. Spear & Sons Limited of Maidenhead, Berkshire, England, a subsidiary of Mattel Inc. Mattel and Spear are not affiliated with Hasbro.