LOGIC-1 WORST-CASE NOISE MARGIN

Domain	Definition
Electrical Engineering	A specification for a semiconductor logic gate, expressing the minimum noise signal that will cause the gate to change state, i. e. the difference between the output-high voltage and the input-high voltage. Source: European Union. (references)
Source: compiled by the editor from various references; see credits.

Language		Translations for "LOGIC-1 WORST-CASE NOISE MARGIN"; alternative meanings/domain in parentheses.
Danish		logisk-1 worst-case stoejmargin. (various references)

Dutch		worst case ruismarge van de logische 1 toestand. (various references)

French		garde au bruit sur le niveau logique 1 dans les pires conditions. (various references)

German		Worst-Case-Störabstand des logischen 1-Zustands. (various references)

Greek		περιθώριο θορύβου χειρίστης περίπτωσης λογικού-1. (various references)

Italian		caso pessimo di margine di rumore per 1 logico. (various references)

Pig Latin		ogic-1lay orst-caseway oisenay arginmay

Portuguese		margem de ruido mais desfavoravel da logica 1. (various references)

Spanish		margen de ruido más desfavorable lógico 1. (various references)

Swedish		sämsta tänkbara brusmarginal för logisk etta. (various references)
Source: compiled by the editor from various translation references.

Specialty Definition: LOGIC-1 WORST-CASE NOISE MARGIN