FIELD-PROGRAMMABLE GATE ARRAY

Domain	Definition
Computing	Field-programmable gate array (FPGA) A gate array where the logic network can be programmed into the device after its manufacture. An FPGA consists of an array of logic elements, either gates or lookup table RAMs, flip-flops and programmable interconnect wiring. Most FPGAs are reprogrammable, since their logic functions and interconnect are defined by RAM cells. The Xilinx LCA, Altera FLEX and AT&T ORCA devices are examples. Others can only be programmed once, by closing "antifuses". These retain their programming permanently. The Actel FPGAs are the leading example of such devices. Atmel FPGAs are currently (July 1997) the only ones in which part of the array can be reprogrammed while other parts are active. As of 1994, FPGAs have logic capacity up to 10K to 20K 2-input-NAND-equivalent gates, up to about 200 I/O pins and can run at clock rates of 50 MHz or more. FPGA designs must be prepared using CAD software tools, usually provided by the chip vendor, to do technology mapping, partitioning and placement, routing, and binary output. The resulting binary can be programmed into a ROM connected to the FPGA or downloaded to the FPGA from a connected computer. In addition to ordinary logic applications, FPGAs have enabled the development of logic emulators. There is also research on using FPGAs as computing devices, taking direct advantage of their reconfigurability into problem-specific hardware processors. Usenet newsgroup: news:comp.arch.fpga. (1997-07-11). Source: The Free On-line Dictionary of Computing.
Source: compiled by the editor from various references; see credits.

Commercial Usage: FIELD-PROGRAMMABLE GATE ARRAY

Domain	Title
Books	FPGA 96: 1996 ACM-Sigda International Symposium on Field-Programmable Gate Array (reference) (more book examples)
Source: compiled by the editor from various references; see credits.

Alternative Orthography: FIELD-PROGRAMMABLE GATE ARRAY

Hexadecimal (or equivalents, 770AD-1900s) (references)

46 49 45 4C 44 2D 50 52 4F 47 52 41 4D 4D 41 42 4C 45 47 41 54 45 41 52 52 41 59

Leonardo da Vinci (1452-1519; backwards) (references)

Binary Code (1918-1938, probably earlier) (references)

01000110 01001001 01000101 01001100 01000100 00101101 01010000 01010010 01001111 01000111 01010010 01000001 01001101 01001101 01000001 01000010 01001100 01000101 00100000 01000111 01000001 01010100 01000101 00100000 01000001 01010010 01010010 01000001 01011001

HTML Code (1990) (references)

&#70 &#73 &#69 &#76 &#68 &#45 &#80 &#82 &#79 &#71 &#82 &#65 &#77 &#77 &#65 &#66 &#76 &#69 &#32 &#71 &#65 &#84 &#69 &#32 &#65 &#82 &#82 &#65 &#89

ISO 10646 (1991-1993) (references)

0046 0049 0045 004C 0044 002D 0050 0052 004F 0047 0052 0041 004D 004D 0041 0042 004C 0045 0047 0041 0054 0045 0041 0052 0052 0041 0059

Encryption (beginner's substitution cypher): (references)

FIELD-PROGRAMMABLE GATE ARRAY

Specialty Definition: FIELD-PROGRAMMABLE GATE ARRAY

Computing

Crosswords: FIELD-PROGRAMMABLE GATE ARRAY

Commercial Usage: FIELD-PROGRAMMABLE GATE ARRAY

Books

Alternative Orthography: FIELD-PROGRAMMABLE GATE ARRAY

46 49 45 4C 44 2D 50 52 4F 47 52 41 4D 4D 41 42 4C 45 47 41 54 45 41 52 52 41 59

01000110 01001001 01000101 01001100 01000100 00101101 01010000 01010010 01001111 01000111 01010010 01000001 01001101 01001101 01000001 01000010 01001100 01000101 00100000 01000111 01000001 01010100 01000101 00100000 01000001 01010010 01010010 01000001 01011001

&#70 &#73 &#69 &#76 &#68 &#45 &#80 &#82 &#79 &#71 &#82 &#65 &#77 &#77 &#65 &#66 &#76 &#69 &#32 &#71 &#65 &#84 &#69 &#32 &#65 &#82 &#82 &#65 &#89

0046 0049 0045 004C 0044 002D 0050 0052 004F 0047 0052 0041 004D 004D 0041 0042 004C 0045 0047 0041 0054 0045 0041 0052 0052 0041 0059

40433946381550524941523547473536463924135543923552523559

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