Copyright © Philip M. Parker, INSEAD. Terms of Use.

JOINT TEST ACTION GROUP

Specialty Definition: JOINT TEST ACTION GROUP

DomainDefinition

Computing

Joint Test Action Group (JTAG, or "IEEE Standard 1149.1") A standard specifying how to control and monitor the pins of compliant devices on a printed circuit board. Each device has four JTAG control lines. There is a common reset (TRST) and clock (TCLK). The data line daisy chains one device's TDO pin to the TDI pin on the next device. The protocol contains commands to read and set the values of the pins (and, optionally internal registers) of devices. This is called "boundary scanning". The protocol makes board testing easier as signals that are not visible at the board connector may be read and set. The protocol also allows the testing of equipment, connected to the JTAG port, to identify components on the board (by reading the device identification register) and to control and monitor the device's outputs. JTAG is not used during normal operation of a board. JTAG Technologies B.V. (http://www.jtag.com/). Boundary Scan/JTAG Technical Information - Xilinx, Inc. (http://www.xilinx.com/support/techsup/journals/jtag/). Java API for Boundary Scan FAQs - Xilinx Inc. (http://www.xilinx.com/products/software/sx/sxfaqs.htm). JTAG Boundary-Scan Test Products - Corelis, Inc. (http://www.corelis.com/products/scanovrv.html). "Logic analyzers stamping out bugs at the cutting edge", EDN Access, 1997-04-10 (http://www.ednmag.com/ednmag/reg/1997/041097/08df_02.htm). IEEE 1149.1 Device Architecture - Boundary-Scan Tutorial from ASSET InterTech, Inc. (http://www.asset-intertech.com/tutorial/arch.htm). "Application-Specific Integrated Circuits", Michael John Sebatian Smith, published Addison-Wesley - Design Automation Cafe (http://www.dacafe.com/DACafe/EDATools/EDAbooks/ASIC/Book/CH14/CH14.2.htm). Software Debug options on ASIC cores - Embedded Systems Programming Archive (http://embedded.com/97/feat9701.htm). Designing for On-Board Programming Using the IEEE 1149.1 (JTAG) Access Port - Intel (http://developer.intel.com/design/flcomp/applnots/292186.htm). Built-In Self-Test Using Boundary Scan by Texas Instruments - EDTN Network (http://www.edtn.com/scribe/reference/appnotes/md003e9a.htm). (1999-11-15). Source: The Free On-line Dictionary of Computing.

Source: compiled by the editor from various references; see credits.

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Crosswords: JOINT TEST ACTION GROUP

Specialty definitions using "JOINT TEST ACTION GROUP": boundary scanIEEE Standard 1149.1JTAG. (references)

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Anagrams: JOINT TEST ACTION GROUP

Scrabble® Enable2K-Verified Anagrams

Words within the letters "a-c-e-g-i-i-j-n-n-o-o-o-p-r-s-t-t-t-t-u"

-5 letters: prognostication.

Source: compiled by the editor from various references; see credits.

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Alternative Orthography: JOINT TEST ACTION GROUP


Hexadecimal (or equivalents, 770AD-1900s) (references)

4A 4F 49 4E 54      54 45 53 54      41 43 54 49 4F 4E      47 52 4F 55 50

Leonardo da Vinci (1452-1519; backwards) (references)

            

Binary Code (1918-1938, probably earlier) (references)

01001010 01001111 01001001 01001110 01010100 00100000 01010100 01000101 01010011 01010100 00100000 01000001 01000011 01010100 01001001 01001111 01001110 00100000 01000111 01010010 01001111 01010101 01010000

HTML Code (1990) (references)

&#74 &#79 &#73 &#78 &#84 &#32 &#84 &#69 &#83 &#84 &#32 &#65 &#67 &#84 &#73 &#79 &#78 &#32 &#71 &#82 &#79 &#85 &#80

ISO 10646 (1991-1993) (references)

004A 004F 0049 004E 0054      0054 0045 0053 0054      0041 0043 0054 0049 004F 004E      0047 0052 004F 0055 0050

Encryption (beginner's substitution cypher): (references)

4449434854254395354235375443494824152495550

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INDEX

1. Crosswords
2. Anagrams
3. Orthography
4. Bibliography


  

Copyright © Philip M. Parker, INSEAD. Terms of Use.