Copyright © Philip M. Parker, INSEAD. Terms of Use.
| Year | Description |
| 2000 | Invention patented by Bradley C. Aldrich and Ravi Kolagotla on March 30th, 2000. Abstract: In one embodiment, a digital signal processor (DSP) is described for multi-level global accumulation. The DSP includes a plurality of absolute difference determinators in a first stage. The absolute difference determinators may include arithmetic logic units (ALUs) in combination with multiplexers. By using multiple absolute difference determinators, the throughput of the DSP is increased. An existing multiplier may be reconfigured into an adder tree to process the absolute difference results obtained in the first stage. To further increase throughput, multiple DSPs with multiple absolute difference determinators may be operated in parallel. |
| Source: selected by the editor from original sources. | |
Copyright © Philip M. Parker, INSEAD. Terms of Use.
