CPU core to bus speed ratio detection

  

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CPU core to bus speed ratio detection

Invention: CPU core to bus speed ratio detection

Year    Description
1996Invention patented by K. C. So and Rajesh Manapat on February 22th, 1996. Abstract: A mechanism for determining a CPU's core-to-bus frequency ratio in a computer system using the CPU itself, rather than an external agent, to sample the external pins on RESET and latch their core/bus frequency ratio information into an internal register. By accessing the information in this internal register, it is possible for the BIOS or any other software to read the internal to external clock ratios and optimize the performance of the system.
Source: selected by the editor from original sources.

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