CMOS bus and transmission line driver having programmable edge rate control

  

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CMOS bus and transmission line driver having programmable edge rate control

Invention: CMOS bus and transmission line driver having programmable edge rate control

Year    Description
1993Invention patented by James R. Kuo on November 1st, 1993. Abstract: A driver for providing binary signals from a data system to a transmission line and a method of charging and discharging the driver output transistor is disclosed. A preferred embodiment of the driver includes an output transistor having its drain-source circuit connectable between the transmission line and ground. An input stage provides a first charging current to the gate of the output transistor for a first charging time period and a first discharging current for discharging the gate of the output transistor for a first discharging time period. A first falling edge speed-up circuit provides a second charging current to the gate of the output transistor for a second charging time period to charge the voltage level of the gate of the output transistor to approximately its threshold voltage level. A gate charging speed-up circuit provides a third charging current to the gate of the output transistor for a third charging time period beginning when the driver output reaches a low logic level and ending when the voltage level of the gate of the output transistor increases to approximately a first voltage supply level. A rising edge discharge circuit provides a second discharging current for discharging the gate of the output transistor for a second discharging time period during which the voltage level of the gate of the output transistor decreases from the first voltage supply level down to approximately the threshold voltage level of the output transistor.
Source: selected by the editor from original sources.

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