Copyright © Philip M. Parker, INSEAD. Terms of Use.
| Year | Description |
| 1991 | Invention patented by Masao Ito and Takahiro Miki on September 17th, 1991. Abstract: A semiconductor integrated circuit includes a complementary MIS circuit including first PMIS and NMIS transistors with their drain electrodes connected together. The integrated circuit further includes a driving level-shift which includes a second PMIS transistor having its drain electrode grounded, and having its source electrode connected to the gate of the first PMIS transistor and to a V.sub.DD voltage supply terminal via a first resistor. The level-shift circuit further includes a second NMIS transistor having its drain electrode connected directly to the V.sub.DD voltage supply terminal, having its source electrode grounded via a second resistor, and having its gate electrode connected to the gate electrode of the second PMIS transistor. An input voltage is applied to the gate electrodes of the second PMIS and NMIS transistors. |
| Source: selected by the editor from original sources. | |
Copyright © Philip M. Parker, INSEAD. Terms of Use.
