CCD delay line with selective delay period circuit

  

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CCD delay line with selective delay period circuit

Invention: CCD delay line with selective delay period circuit

Year    Description
1993Invention patented by Tetsuya Kondo and Maki Sato on August 26th, 1993. Abstract: A charge transfer device includes a first input stage converting a first input signal into first signal charge, a first shift register transferring the first signal charge with a first delay amount, a second input stage converting a second input signal into second signal charge and having a first switch for selectively inputting the second signal charge to a second shift register, a third input stage converting a third input signal into third signal charge and having a second switch for selectively inputting the third signal charge to a third shift register, and an adding section for selectively adding one of the second and third signal charge to the first signal charge. The second shift register transfers the second signal charge with a second delay amount and the third shift register transfers the third signal charge with a third delay amount.
Source: selected by the editor from original sources.

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Webster's Online Dictionary
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