Bi-CMOS out buffer circuit for CMOS logic

Year	Description
1991	Invention patented by Koichiro Okumura on November 28th, 1991. Abstract: A semiconductor logic circuit includes a CMOS logic circuit having a first input terminal and first and second MOSFETs serially connected between a power source and a ground. The connection point of the first MOSFET to the second MOSFET serves as a first output terminal. The gates of the first and second MOSFETs are connected to the first input terminal. A partial circuit has second and third input terminals. Third and fourth MOSFETs are serially connected between the power source and ground. A connection point of the third MOSFET to the fourth MOSFETs serves as a second output terminal. The second and third input terminals are connected to the first input terminal and to the first output terminal, respectively. A fifth MOSFET is connected between the power source and the second output terminal and has a gate connected to the first output terminal. And a bipolar transistor and a sixth MOSFET are serially connected between the power source and ground. The bipolar transistor has an input terminal connected to the second output terminal. The sixth MOSFET has an input terminal connected to the first output terminal. And the common connection point of the sixth MOSFET to the bipolar transistor serves as an output terminal of the semiconductor logic circuit.
Source: selected by the editor from original sources.

Invention: Bi-CMOS out buffer circuit for CMOS logic