Bi-CMOS logic circuit having full voltage swing and rapid turn-off

Year	Description
1990	Invention patented by Shinzou Satou, Kou Ebihara, Toru Nakamura, and Toshiyuki Koreeda on October 18th, 1990. Abstract: A Bi-CMOS logic circuit includes first and second bipolar transistors connected in series between a first power source and a second power source. An output signal is drawn from a connection node at which first and second bipolar transistors are connected in series. The Bi-CMOS logic circuit also includes a first impedance element, connected between a base and an emitter of the first bipolar transistor, providing a first impedance, and a second impedance element, connected between a base of the second bipolar transistor and an emitter thereof, providing a second impedance. Further, the Bi-CMOS logic circuit includes a first MOS transistor connected between the collector of the first bipolar transistor and the base thereof, a second MOS transistor connected between the collector of the second bipolar transistor and the base thereof, an input signal being applied to gates of the first and second MOS transistors; and a third MOS transistor connected between the base of the first bipolar transistor and the second power source. The third MOS transistor has the gate thereof connected to the base of the second bipolar transistor.
Source: selected by the editor from original sources.

Invention: Bi-CMOS logic circuit having full voltage swing and rapid turn-off