Bi-CMOS circuit

Year	Description
1991	Invention patented by Hiroyuki Mathuda and Shinzou Satou on May 14th, 1991. Abstract: A Bi-CMOS circuit includes a bipolar output stage and a CMOS circuit. The bipolar output stage includes pull-up and pull-down transistors which form an output end. The CMOS circuit receives an input signal and generates a signal for driving the output stage. The CMOS circuit comprises a CMOS inverter for receiving the input signal, a p-channel MOS transistor for driving the pull-up transistor of the bipolar output stage based on the input signal, an n-channel MOS transistor for driving the pull-down transistors of the bipolar output stage based on the input signal, a p-channel MOS transistor for discharging a base of the pull-up transistor based on an output of the CMOS inverter, and an n-channel MOS transistor for discharging a base of the pull-down transistor based on an output of the CMOS inverter.
1995	Invention patented by Takao Nakajima, Takayuki Harima, and Makoto Segawa on April 16th, 1995. Abstract: A BiCMOS circuit includes a CMOS circuit for inverting data applied to an input terminal and a first bipolar transistor, having a base connected to an output point of this CMOS circuit, a collector connected to a power supply voltage and an emitter connected to an output terminal, for charging the output terminal. The BiCMOS circuit also includes a second bipolar transistor, having a collector connected to the output terminal, for discharging the output terminal, a first MOS transistor of a first conductivity type connected in parallel between the base and the collector of the second bipolar transistor and a second MOS transistor of the first conductivity type connected in series with the first MOS transistor and having a gate connected to an output point of the CMOS circuit. The Bi-CMOS circuit further includes a third MOS transistor of the first conductivity type connected between the input terminal and the gate of the first MOS transistor of the first conductivity type and having a gate receiving a first reference voltage, and a fourth MOS transistor of a second conductivity type connected between the first reference voltage and the gate of the first MOS transistor. A large variation width of an output voltage can be ensured, and hence the Bi-CMOS circuit normally operates even at a low voltage without any deterioration in terms of delay time.
Source: selected by the editor from original sources.

Bi-CMOS circuit

Invention: Bi-CMOS circuit