Affinity checking process for multiple processor, multiple bus optimization of throughput

  

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Affinity checking process for multiple processor, multiple bus optimization of throughput

Invention: Affinity checking process for multiple processor, multiple bus optimization of throughput

Year    Description
2000Invention patented by Lauren Ann Cotugno, Philip Douglas Wilson, Mark Douglas Whitener, and Stephen Lane Billard on August 10th, 2000. Abstract: A method is provided to establish affinity for each pair of processors with a specific processor bus which eliminates the need for cross-bus operations in cache invalidation operations. Each pair of processors in the network is exercised for elapsed time of cache update cycle completion. Those pairs having the minimal execution times are then selected for utilization of applications to be executed.
Source: selected by the editor from original sources.

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Webster's Online Dictionary
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