Copyright © Philip M. Parker, INSEAD. Terms of Use.

| Year | Description |
| 1992 | Invention patented by Jeong-Hyeok Choi and Chul-Ho Shin on November 24th, 1992. Abstract: A method for manufacturing highly integrated NAND and NOR logic mask read only memory (MROM) devices is disclosed. Over the top surface of a semiconductor substrate, where a first polysilicon layer is formed, a pattern of a gate electrode is formed along a word line in the order of odd numbers or even numbers. Next, an insulation layer having a thickness of a submicron range is formed over the top surface of the substrate. And then a photoresist is covered and an etch back process is performed. Thereafter, the exposed insulation layer caused by the etch back process and the polysilicon layer are selectively etched to form a word line spacing corresponding to a thickness of the insulation layer. Thus, spacing between adjacent word lines can be minimized and a process margin can be sufficiently ensured. |
| Source: selected by the editor from original sources. | |
Copyright © Philip M. Parker, INSEAD. Terms of Use.